The 78th JSAP Autumn Meeting, 2017

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[8a-C18-1~12] 13.5 Semiconductor devices and related technologies

6.1と13.3と13.5のコードシェアセッションあり

Fri. Sep 8, 2017 9:00 AM - 12:15 PM C18 (C18)

Tomonori Nishimura(Univ. of Tokyo), Takahiro Mori(AIST)

9:00 AM - 9:15 AM

[8a-C18-1] Impacts of Device Parameter Values on the Performance of Vertical TFET

Yuyang Jiang1, Yoshiaki Mori1, Shingo Sato1, Yasuhisa Omura1, Abhijit Mallik2 (1.Kansai Univ., 2.Univ. of Calcutta)

Keywords:vertical TFET, device model, simulations

We must have many simulation results to characterize the behavior of TFETs in order to make a model to reproduce their characteristics in detail. In this prsentation, we will introduce some simulation results to characterize the vertical TFET assumed here.