The 78th JSAP Autumn Meeting, 2017

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13 Semiconductors » 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[8a-C21-1~11] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

Fri. Sep 8, 2017 9:15 AM - 12:00 PM C21 (C21)

Reo Kometani(Univ. of Tokyo)

11:45 AM - 12:00 PM

▲ [8a-C21-11] Fermi-level pinning at metal/SiGe interface

〇(M1)Xuan Luo1, Tomonori Nishimura1, Takeaki Yajima1, Akira Toriumi1 (1.The Univ. of Tokyo)

Keywords:Fermi-level pinning, SiGe