[16a-E206-1~13] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[16a-E206-11] Minimal SOI-CMOS Fabrication Using Soild Source Diffusion by Spin on Dopants

〇Yongxun Liu¹, Kazuhiro Koga^1,2, Sommawan Khumpuang^1,2, Masayoshi Ngao¹, Takashi Matsukawa¹, Shiro Hara^1,2 (1.AIST, 2.MINIMAL)

Keywords:Spin on dopant, Minimal, Soild source diffusion

We are developing PVD-TiN metal gate SOI-CMOS integrated circuits using minimal-fab and mega-fab hybrid process. In this presentation, we report the minimal SOI-CMOS fabrication process using solid source diffusion by spin on dopants (SOD) and demonstrate the electrical characteristics of the fabricated SOI-CMOS integrated circuits.