10:15 〜 10:30
▲ [19a-146-6] Investigation on the trap states at p-GaN MO(I)S interface with different gate dielectric layers
キーワード：p-GaN, MIS, MOS
Recent progresses in the GaN-based electronic devices have demonstrated them as excellent candidates for the high power supply and switching systems, due to their unique characteristics, such as the high blocking voltage, wide bandgap, large electron saturation velocity and high thermal stability. However, the development of p-channel field effect transistors (FETs) is still in its infancy in comparison to the n-channel ones. It is found that the performance of p-channel FET was restricted by the poor-quality p-GaN MOS interface. As a result of Mg accumulation to the p-GaN surface, a large surface band bending was observed for the native p-GaN, which lead to in an interfacial Mg-Ga-O disordered region with high-density trap states for Al2O3 gate dielectric layer.
In this paper, we investigated the p-GaN MIS and MOS capacitors with different gate dielectric layer such as CaF2, SiNx, SiO2, and Al2O3. The interface quality and traps behaviors are evaluated with regard to the microstructure and electrical characteristics. The oxide and oxygen-free gate dielectric layers were compared for the performance of p-GaN electronic devices.
In this paper, we investigated the p-GaN MIS and MOS capacitors with different gate dielectric layer such as CaF2, SiNx, SiO2, and Al2O3. The interface quality and traps behaviors are evaluated with regard to the microstructure and electrical characteristics. The oxide and oxygen-free gate dielectric layers were compared for the performance of p-GaN electronic devices.