10:15 AM - 10:30 AM
[19a-212B-5] p-MoS2/HfS2 Tunnel FET Using Ni Backgate Buried in HfO2 Dielectric
Keywords:Two-dimensional Materials, Tunnel FET, Gate Leakage
In transition metal dichalcogenides (TMDs), MoS2 and HfS2 are able to form type-II band alignment with appropriate band offset. In former trails, we fabricated p-MoS2/HfS2 tunnel FET (TFET) with a backgate to switch the current toward TFETs. However, we observed the degradation of the subthreshold swing (SS), probably due to interface traps at the gate interface. Impact of the interface trap can be suppressed by increasing the value of gate dielectric capacitance. Hence, a steep SS can be obtained by enlarging the gate dielectric capacitance. Nevertheless, reducing the thickness of the gate dielectric gives rise to a severer gate leakage. As we used a global backgate structure, an extra path due to the overlap between the S/D electrode pad and the backgate provide more gate leakage. To lower the gate leakage and investigate the intrinsic subthreshold characteristics, we utilized a Ni backgate buried in HfO2 gate dielectric. In comparison with our previous work, 25 nm Al2O3, equivalent oxide thickness (EOT) = 10.8 nm, replaced by 15 nm HfO2 (EOT = 3.7 nm) lead to a 3 times increase in the gate dielectric capacitance, which can effectively optimize the device performance in spite of the interface trap. The SS of the p-MoS2/HfS2 TFET is reduced to 300 mV/dec. By increasing the oxide thickness and reducing over 97% overlap area, the gate leakage current was effectively suppressed to around 10-12 A.