Reduced Drain-Induced-Barrier-Lowering (DIBL) Variability at High Temperature in Bulk and SOTB MOSFETs

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

Thu. Sep 20, 2018 9:00 AM - 12:15 PM CE (Century Hall)

9:30 AM - 9:45 AM

〇(M2)Shuang Gao¹, Tomoko Mizutani¹, Kiyoshi Takeuchi¹, Masaharu Kobayashi¹, Toshiro Hiramoto¹ (1.IIS, Univ. of Tokyo)

Keywords:variability, temperature, DIBL