The 79th JSAP Autumn Meeting, 2018

Presentation information

Poster presentation

15 Crystal Engineering » 15.6 Group IV Compound Semiconductors (SiC)

[21p-PB6-1~10] 15.6 Group IV Compound Semiconductors (SiC)

Fri. Sep 21, 2018 1:30 PM - 3:30 PM PB (Shirotori Hall)

1:30 PM - 3:30 PM

[21p-PB6-10] Improvement of Drain-Source Current Leakage by Formation of a High Temperature Ion Implantation Mask of SiC Trench MOSFET Device without Dry Etching Process

Kazunari Kawamoto1, Yusuke Kobayashi1, Takenori Fujiwara2, Toru Okazawa2, Makoto Hayasaka2, Naoyuki Oose3, Shinsuke Harada1, Hajime Okumura1 (1.AIST, 2.Toray, 3.Fuji Electric)

Keywords:silicon carbide, trench MOSFET, heat-resistant photoresist

Drain-Source current leakage was improved by having changed the high-temperature ion implantation mask formation of the SiC trench MOSFET device from the conventional dry etching process to the non-dry etching process using the heat-resistant photoresist.We estimate that the etching damage that was observed on the SiC wafer surface in the dry etching process has a serious influence on Drain-Source current leakage.