2018年第65回応用物理学会春季学術講演会

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一般セッション(ポスター講演)

13 半導体 » 13.5 デバイス/集積化技術

[17p-P8-1~24] 13.5 デバイス/集積化技術

2018年3月17日(土) 13:30 〜 15:30 P8 (ベルサール高田馬場)

13:30 〜 15:30

[17p-P8-3] Effects of the impurity concentration in the Ge sources on the electrical properties of Ge/Si TFETs

〇(D)TaeEon Bae1、Kimihiko Kato1、Ryota Suzuki1、Ryosho Nakane1、Mitsuru Takenaka1、Shinichi Takagi1 (1.Tokyo Univ.)

キーワード:Tunnel FET, Source concentration, Degeneracy Fermi level

Development of the optimum materials, the structures and the fabrication process is essential in enhancing the performance of tunneling field-effect transistors (TFET). A Ge-source/Si-channel hetero-junction TFET is a promising device structure because of the type-II staggered band alignment between Ge and Si. In this TFET structure, the source impurity concentration, which determines the depletion width and the resulting tunneling distance, is a critical factor to enhance the electrical characteristics. The effects of the Ge-source impurity concentration on the electrical characteristics of Ge/Si TFETs were experimentally studied. The source concentration of 9x1018 cm-3 has been found to be optimal for steep SS. The degradation in SS with higher source concentrations is explained by the depression of the energy filtering effect due to the degeneracy of EF, which has been supported by the temperature dependence of SS.