The 65h JSAP Spring Meeting, 2018

Presentation information

Symposium (Oral)

Symposium » Is Ge substituting for Si?

[19p-G203-1~7] Is Ge substituting for Si?

Mon. Mar 19, 2018 1:30 PM - 5:10 PM G203 (63-203)

Toshifumi Irisawa(AIST), Tsutomu Tezuka(TOSHIBA), Kazuhiko Endo(AIST)

2:30 PM - 3:00 PM

[19p-G203-3] High quality UTB GeOI by HEtero-Layer-Lift-Off (HELLO) technology for future Ge CMOS application

Wen Hsin Chang1, Toshifumi Irisawa1, Hiroyuki Ishii1, Hiroyuki Hattori1, Hiroyuki Ota1, Hideki Takagi1, Yuichi Kurashima1, Noriyuki Uchida1, Tatsuro Maeda1 (1.AIST)

Keywords:GeOI, UTB

Ultrathin body (UTB) Ge-on-insulator (GeOI) are compulsory structure for improved gate control and immunity against short channel effects in the ultimately scaled high performance and low power CMOS. However, severe mobility degradation has been reported as Ge thickness scaling down less than 20 nm. Therefore, more sophisticated fabrication methods of UTB GeOI substrates are strongly required for improving its quality. In this work, a novel Ge layer transfer technology called HEtero-Layer-Lift-Off (HELLO) utilizing SiGe etch stop layer and back interface engineering has been developed both for precise control of Tbody and high back interfacial quality in GeOI structure. Enhancement of carrier mobility of UTB GeOI n and pMOSFETs has been demonstrated, showing the potential of UTB GeOI substrates for future Ge CMOS realization.