Kenichiro Takiguchi

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Speaker, Author, Co-Author

Wed. Sep 18, 2019 9:00 AM - 12:00 PM B11 (B11)

Oral presentation
| 13 Semiconductors
| 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[18a-B11-1~11] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

11:15 AM - 11:30 AM

[18a-B11-9] Performance evaluation of power gating architectures using nonvolatile/virtually-nonvolatile Flip-Flops

〇Kenichiro Takiguchi¹, Daiki Kitagata¹, Tsubasa Matsuzaki¹, Syuu'ichirou Yamamoto¹, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech.)