[18a-B11-1~11] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[18a-B11-11] Nonvolatile power-gating using NV-SRAM based on the proactive flash of useless data

〇Daiki Kitagata¹, Shuu'ichirou Yamamoto¹, Satoshi Sugahara¹ (1.FIRST, Tokyo Inst. of Tech.)

Keywords:CMOS logic system, Power gating, SRAM