[18p-B11-1~14] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[18p-B11-13] Research on embedded technology of fine Cu wiring by new electorolytic plating method

〇Haruo Iwatsu¹ (1.Kumamoto Univ.)

Keywords:Electrolytic plating, Cu wiring, Grain size

In order to reduce the Cu wiring resistance of the semiconductor integrated circuit, it is necessary to enlarge the wiring crystal and reduce the chance of electron scattering at grain boundaries. Conventionally, a plating solution additive for embedding in fine wiring grooves hinders crystal growth, and thermal annealing for growing after plating generates stress and there is a concern of reliability. Therefore, we report a new electrolytic plating technology that can realize embedding in fine grooves while growing crystal grains large without additives.