2019年第80回応用物理学会秋季学術講演会

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一般セッション(口頭講演)

13 半導体 » 13.3 絶縁膜技術

[19a-E305-1~12] 13.3 絶縁膜技術

2019年9月19日(木) 09:00 〜 12:15 E305 (E305)

藤井 章輔(東芝メモリ)、堀田 育志(兵庫県立大)

12:00 〜 12:15

[19a-E305-12] Evaluation of surface potential of ferroelectric-gate MOS capacitors
by C-V analyses

〇(M2)Chenyu Liao1、Kasidit Toprasertpong1、Taichirou Fukui1、Mitsuru Takenaka1、Shinichi Takagi1 (1.The Univ. of Tokyo)

キーワード:ferroelectric-gate

MOSFETs using HfO2-based-ferroelectric gate insulators have been expected as a steep slope device, because of the negative capacitance (NC) effect, which could be stabilized when placed in series with a paraelectric insulator in theory. However, the reality of the quasi-static NC effect, predicted by the theory, has still been controversial. In order to verify the quasi-static NC effect, the accurate determination of the surface potential (φs) with changing gate voltage (Vg) is necessary. In this study, thus, we examine to evaluate φs of metal/ferroelectric/ Si (MFS) and metal/ferroelectric/insulator/Si (MFIS) capacitors with HfZrO2 as a function of Vg and the sensitivity (ΔφsVg) through the capacitance-Vg analyses.