The 80th JSAP Autumn Meeting 2019

Presentation information

Oral presentation

13 Semiconductors » 13.7 Compound and power electron devices and process technology

[20a-E301-1~12] 13.7 Compound and power electron devices and process technology

Fri. Sep 20, 2019 9:00 AM - 12:15 PM E301 (E301)

Kenji Shiojima(Univ. of Fukui)

9:45 AM - 10:00 AM

[20a-E301-4] DLTS studies of interface states for SiO2/n-GaN deposited by different methods

〇(M2)Kazuya Tamura1, Yutaka Tokuda1, Takashi Okawa2, Hidemoto Tomita2 (1.Aichi Inst. of Technol., 2.Toyota Motor Corporation)

Keywords:GaN, DLTS

We have studied interface states of the SiO2/n-GaN prepared by using different deposition methods of SiO2. Interface state distributions were obtained by DLTS measurements in the temperature range from 80 to 400 K. Interface state densities for the p-CVD SiO2/n-GaN were from 6.3 to 3.1×1011 eV-1cm-2 in the energy range from Ec-0.14 to 0.74 eV, while those for the ALD SiO2/GaN was 2.2 to 0.5×1011 eV-1cm-2. It is found that interface state densities for p-CVD SiO2/n-GaN were larger than those for the ALD one, which might be ascribed to the damage induced by p-CVD.