10:30 AM - 10:45 AM
▼ [11a-W833-6] Catalyst-free formation of Si/Ge core-shell nanowire arrays
Keywords:Si/Ge nanowires, Catalyst-free
Silicon (Si) and germanium (Ge) nanowires (NWs) have been suggested as building blocks of vertical type metal oxide semiconductor field effect transistors (MOSFETs) with high speed and low energy consumption . The general method to the synthesis of the NWs is chemical vapor deposition (CVD) approach based on the vapor-liquid-solid (VLS) growth mechanism that requires metal as catalysts, such as gold, which causes contamination in the NW structure and affects their properties. Moreover, NWs are grown in many directions by CVD, which are inefficient for integration. Development of catalyst-free growth of NWs with array structure is highly desirable for future electronic devices. In this study, we showed the feasibility of using catalyst-free method to fabricate p-Si/i-Ge core-shell NWs and p-Si/i-Ge/p-Si core-double shell NWs with well-ordered heterojunction structures. To prevent metal catalyst contamination, nanoimprint lithography (NIL) technique was performed. A precise diameter control for the NWs was realized. Impurity doping is important to functionalize nanostructures and realize novel devices. However, impurity scattering needs to be considered. To suppress this, core-shell NWs were epitaxially grown after NIL. To characterize the NWs, Raman spectroscopy has been employed to study the bond states and electrical activities of dopant impurities. Transmission electron microscopy (TEM) with EDX mapping showed good crystallinity and sharp interface. X-ray diffraction (XRD) measurement has been characterized to exhibit the relationship of lattice stress between Si and Ge. These results indicated that carrier transport region could be separated from the impurity doped region and therefore suppressed impurity scattering by constructing core-shell structures.