The 66th JSAP Spring Meeting, 2019

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices/ Interconnect/ Integration technologies

[9p-S221-1~15] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

Sat. Mar 9, 2019 1:45 PM - 5:45 PM S221 (S221)

Jiro Ida(Kanazawa Inst. of Tech.), Noriyuki Taoka(AIST)

2:00 PM - 2:15 PM

[9p-S221-2] Improvement of sub-threshold characteristics in bilayer TFETs by utilizing ultra-flat ZnSnO channel layer

Kimihiko Kato1, Hiroaki Matsui1, Hitoshi Tabata1, Mitsuru Takenaka1, Shinichi Takagi1 (1.Univ. of Tokyo)

Keywords:TFET, Oxide semiconductor, ZnSnO

We are proposing bilayer tunneling field effect transistors (TFETs) by utilizing an n-type oxide semiconductor channel and a p-type group-IV semiconductor source for ultra-low power switching devices. In this study, we demonstrated the TFET operation with an amorphous oxide semiconductor channel with high thickness uniformity to improve the sub-threshold characteristics. It is found that both composition ratio and deposition temperature of a ZnSnO layer are important parameter to obtain amorphous structure with high uniformity. It is also clarified that the amorphous ZnSnO channel can reduce the averaged SS value largely compared to the poly-crystalline ZnO channel.