Hidenori Tsuji

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Speaker, Author, Co-Author

Thu. Sep 23, 2021 11:00 AM - 12:40 PM P10 (Poster)

Poster presentation
| 13 Semiconductors
| 13.7 Compound and power devices, process technology and characterization

[23a-P10-1~14] 13.7 Compound and power devices, process technology and characterization

11:00 AM - 12:40 PM

[23a-P10-11] Calculation of interface trap level at GaN/SiO₂ interface

〇Hidenori Tsuji¹, Yuki Ohuchi¹, Katsunori Ueno¹, Shinya Takashima¹, Ryo Tanaka¹, Masaharu Edo¹ (1.Fuji Electric)