[16a-Z13-1~12] 13.3 Insulator technology

▲ [16a-Z13-6] Characterization of slow traps in MOS interfaces of TiN/Y₂O₃/SiGe gate stacks

〇(D)TsungEn Lee, Kasidit Toprasertpong¹, Mitsuru Takenaka¹, Shinichi Takagi¹ (1.Univ. of Tokyo)

Keywords:SiGe, high-k

One of the critical issues of SiGe MOSFETs, promising as a CMOS channel material, is the formation of high-quality gate stacks. We have demonstrated the SiGe MOS interfacial properties with low interface trap density (D_it) over a wide range of Ge contents by using TiN/Y₂O₃ gate stacks with a TMA treatment [1]. However, the slow traps properties in the SiGe MOS interfaces have not been fully studied yet. In this work, we present the impacts of the Ge content of SiGe on the density (N_st) and properties of slow traps in TiN/Y₂O₃/SiGe MOS interfaces. Based on the experimental results, the characteristics and a possible origin of the slow traps in SiGe MOS interfaces are discussed.