[25a-E104-1~10] 8.2 Plasma deposition of thin film, plasma etching and surface treatment

[25a-E104-7] Impact of bias supply timing on etched feature profiles in the C₄F₈ and SF₆ cycle process

〇Taito Yoshie¹, Takayoshi Tsutsumi¹, Kenji Ishikawa¹, Hiroki Kondo¹, Makoto Sekine¹, Masaru Hori¹ (1.Nagoya Univ.)

Keywords:Plasma etching, Semiconductor, Gas modulation cycle process