The 70th JSAP Spring Meeting 2023

Presentation information

Oral presentation

13 Semiconductors » 13.4 Si processing /Si based thin film / MEMS / Equipment technology

[15p-B410-1~15] 13.4 Si processing /Si based thin film / MEMS / Equipment technology

Wed. Mar 15, 2023 1:00 PM - 5:30 PM B410 (Building No. 2)

Masato Sone(Tokyo Tech), Fumito Imura(Hundred Semiconductors Inc.)

4:00 PM - 4:15 PM

[15p-B410-11] Evaluation of Crystal Defects in the Sidewall of Si Trench using Photoluminescence Spectroscopy

〇(M2)Longxiang Men1, Yuta Ito1, Junghyeok Shin1, Ryo Yokogawa1,2, Atsushi Ogura1,2, Kazuto Kawakatsu3, Jun Yoshigiwa3, Koichiro Saga3, Hayato Iwamoto3 (1.Meiji Univ., 2.MREL, 3.Sony Semiconductor Solutions Corporation)

Keywords:photoluminescence, Si trench, oxide precipitation

Along with the miniaturization and high integration of semiconductor devices, the development and practical application of three-dimensional structures such as FinFET are being promoted. In the dry etching used to form Si trenches, the damage applied to the sidewalls is regarded as a problem. These may hinder the improvement of device performance, and attempts have been made to recover crystals by heat treatment. However, there have been no reports on the detailed evaluation of what kind of defects are generated after processing, and so far we have not been able to evaluate crystal defects and crystal recovery in the deep-level region.
In view of the above background, in this study, we evaluate deep-level defects using the photoluminescence (PL) method, which observes the various electronic states of the crystal, and we aim to identify the defects generated during trench processing and to understand the behavior of the crystalline state due to heat treatment.