[J-9] GaN Power Devices

[J-9-04] Stability of Monolithically Integrated Power devices for 200V GaN-on-SOI power circuits platform

〇Deepthi Cingu¹, Olga Syshchyk¹, Dirk Wellekens¹, Thibault Cosnier¹, Matteo Borga¹, Urmimala Chatterjee ¹, Benoit Bakeroot², Niels Posthuma¹, Stefaan Decoutere¹ (1. Imec (Belgium), 2. Center for Microsystems Technology (Belgium))

Presentation style: On-site (in-person)

https://doi.org/10.7567/SSDM.2022.J-9-04

The stability of the monolithically integrated Enhance-ment-mode p-GaN HEMTs, Depletion Mode MIS HEMTs and Schottky Barrier diodes in a 200 V GaN-on-SOI technology is studied for two different dielectric options. This paper focuses mainly on wafer-level High Temper-ature Reverse Bias (HTRB), High Temperature Gate Bias (HTGB) and High Temperature Forward Bias (HTFB) experiments. The results display that the addition of the integral components has shown no impact on the stability of the baseline p-GaN HEMTs.