Channel Trimming Process to Improve Electro-thermal Characteristics for Sub-3-nm Node Nanosheet Field-Effect Transistors with Laser Spike Annealing

Sanguk Lee

doi:https://doi.org/10.7567/SSDM.2023.F-7-06

Presentation information

Oral Presentation

01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[F-7] Advanced CMOS: Device Technology 1

Fri. Sep 8, 2023 1:30 PM - 3:15 PM Room F (224, Bldg. 2)

Session Chairs: Anabela Veloso (imec), Seungkwon Kim (Samsung Electronics)

3:00 PM - 3:15 PM

[F-7-06 (Late News)] Channel Trimming Process to Improve Electro-thermal Characteristics for Sub-3-nm Node Nanosheet Field-Effect Transistors with Laser Spike Annealing

^○Sanguk Lee¹, Jinsu Jeong¹, Seunghwan Lee¹, Junjong Lee¹, Jaewan Lim¹, Yonghwan Ahn¹, Rockhyun Baek¹ (1. Univ. of POSTECH (Korea))

https://doi.org/10.7567/SSDM.2023.F-7-06

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Presentation information

[F-7] Advanced CMOS: Device Technology 1

[F-7-06 (Late News)] Channel Trimming Process to Improve Electro-thermal Characteristics for Sub-3-nm Node Nanosheet Field-Effect Transistors with Laser Spike Annealing

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