[S-IIIB-9] A Novel Storage Capacitance Enlargement Structure Using a Double-Stacked Storage Node in STC DRAM Cell

T. Kisu、S. Kimura、T. Kure、J. Yugami、A. Hiraiwa、Y. Kawamoto、M. Aoki、H. Sunami (1.Hitachi VLSI Engineering Corp.、2.Central Research Laboratory, Hitachi, Ltd.)

https://doi.org/10.7567/SSDM.1988.S-IIIB-9