Low Temperature Poly-Si TFTs Using Solid Phase Crystallization (SPC) of Very Thin Films and an ECR-CVD Gate Insulator

Thomas W. LITTLE; Ken-ichi TAKAHARA; Hideki KOIKE; Takashi NAKAZAWA; Ichio YUDASAKA; Hiroyuki OHSHIMA

doi:https://doi.org/10.7567/SSDM.1991.PC5-15

[PC5-15] Low Temperature Poly-Si TFTs Using Solid Phase Crystallization (SPC) of Very Thin Films and an ECR-CVD Gate Insulator

Thomas W. LITTLE, Ken-ichi TAKAHARA, Hideki KOIKE, Takashi NAKAZAWA, Ichio YUDASAKA, Hiroyuki OHSHIMA (1.SEIKO EPSON CORPORATION TFT Research Laboratory)

https://doi.org/10.7567/SSDM.1991.PC5-15

1991 International Conference on Solid State Devices and Materials

[PC5-15] Low Temperature Poly-Si TFTs Using Solid Phase Crystallization (SPC) of Very Thin Films and an ECR-CVD Gate Insulator