[B-3-2] A New Triple-Well Process to Accomplish a Lower Vth and a Low Cost for Low Power-Supply Voltage VLSI

J. Mitani, K. Itabashi, M. Nagase, M. Kawano, T. Ema (1.Memory Process Integration Dept., Fujitsu Ltd.)

https://doi.org/10.7567/SSDM.1995.B-3-2