A Post Gigabit Generation Flash Memory Shallow Trench Isolation Scheme. The LATI-STI Process (LArge Tilt Implanted Sloped Trench Isolation) Using 100% CMP Planarization

[C-4-3] A Post Gigabit Generation Flash Memory Shallow Trench Isolation Scheme. The LATI-STI Process (LArge Tilt Implanted Sloped Trench Isolation) Using 100% CMP Planarization

S. DELEONIBUS, M. HEITZMANN, Y. GOBIL, F. MARTIN, O. DEMOLLIENS, J. -C. GUIBERT (1.LETI(CEA) Dept de Microelectronique CENG)