Analysis of Si-Ge Source Structure in 0.15 μm SOI MOSFETs Using Two-Dimensional Device Simulation

Osamu ARISUMI; Kazuya MATSUZAWA; Naoyuki SHIGYO; Mamoru TERAUCHI; Akira NISHIYAMA; Makoto YOSHIMI

doi:https://doi.org/10.7567/SSDM.1995.PC-10-8

1995 International Conference on Solid State Devices and Materials

1995年8月21日〜 1995年8月24日
International House, Osaka, Japan

[PC-10-8] Analysis of Si-Ge Source Structure in 0.15 μm SOI MOSFETs Using Two-Dimensional Device Simulation

Osamu ARISUMI、Kazuya MATSUZAWA、Naoyuki SHIGYO、Mamoru TERAUCHI、Akira NISHIYAMA、Makoto YOSHIMI (1.ULSI Research Laboratories, R & D Center, Toshiba Corporation)

https://doi.org/10.7567/SSDM.1995.PC-10-8

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