[A-2-2] Proposal of Pseudo Source and Drain MOSFETs and Evaluation for 10-nm Gate MOSFETs

H. Kawaura, T. Sakamoto, T. Baba, Y. Ochiai, J. Fujita, S. Matsui, J. Sone (1.Fundamental Research Laboratories, NEC Corporation)

https://doi.org/10.7567/SSDM.1996.A-2-2