The Japan Society of Applied Physics

[C-11-4] High Performance 0.2 μm Dual Gate CMOS by Suppression of Transient-Enhanced-Diffusion Using Rapid Thermal Annealing Technologies

Y. Nishida、H. Sayama、S. Shimizu、T. Kuroi、A. Furukawa、A. Teramoto、T. Uchida、Y. Inoue、T. Nishimura (1.ULSI Laboratory and Advanced Technology R&D Center, Mitsubishi Electric Corporation)

https://doi.org/10.7567/SSDM.1997.C-11-4