[F-10-4] Optical Component Coupling using Self-Written Waveguides

Naohiro Hirose、Osamu Ibaragi (1.Electronic System Integration Technology Department, Association of Super-Advanced Electronics Technologies (ASET), c/o NTT Musashino R&D Center)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-1-1] Silicon Integration of UWB: Choices and Challenges

Siva G. Narendra (1.Circuit Research ? Intel Labs)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-1-2] Low-Power Real-Time Region-Growing Image-Segmentation in 0.35μm CMOS due to Subdivided-Image and Boundary-Active-Only Architectures

Takashi Morimoto、Youmei Harada、Tetsushi Koide、Hans Jurgen Mattausch (1.Research Center for Nanodevices and Systems, Hiroshima University)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-1-3] Butterfly-Unit Based Programmable Computation Element Using Merged Module of Multiplication, Division and Square Root

Leo Karnan、Naoto Miyamoto、Kazuyuki Maruo、Koji Kotani、Tadahiro Ohmi (1.Graduate School of Engineering, Tohoku University、2.Advantest Laboratories Ltd.、3.New Industry Creation Hatchery Center, Tohoku University)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-1-4] A Hierarchical 512-Kbit SRAM with 8 Read/Write Ports in 130nm CMOS

Seiji Fukae、Nobuhiko Omori、Tetsushi Koide、Hans Jurgen Mattausch、Tetsuo Hironaka (1.Research Center for Nanodevices and Systems, Hiroshima University、2.Department of Computer Engineering, Hiroshima City University)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-1-5] Combined Data/Instruction Cache with Bank-Based Multi-Port Architecture

Koh Johguchi、Zhaomin Zhu、Tai Hirakawa、Tetsushi Koide、Tetsuo Hironaka、Hans Jurgen Mattausch (1.Research Center for Nanodevices and Systems, Hiroshima Univ.、2.Grad. School of Infomation Sci., Hiroshima City Univ.)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-2-1] Performance of Deeply-Scaled, Power-Constrained Circuits

Borivoje Nikolic、Leland Chang、Tsu-Jae King (1.Department of Electrical Engineering and Computer Sciences, University of California)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-2-2] ESD Circuit Simulation Technology Using Protection Device Model with Generated-Hole-Dependent Base Resistance

Yoshiharu Tosaka、Hiromi Anzai、Kunihiro Suzuki、Hideki Oka (1.Fujitsu Laboratories Ltd.)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-2-3] A New Protection Circuit of IGBT (Insulated Gate Bipolar Transistor) for Short-Circuit Withstanding Capability

Byung-Chul Jeon、In-Hwan Ji、Min-Koo Han、Yearn-Ik Choi (1.#50, 301-1115, School of Electrical Eng., Seoul Nat’l Univ.、2.School of Electronics Engineering, Ajou University)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

[G-2-4] Dynamic Holding Voltage SCR (DHVSCR) Device for ESD Protection with high Latch-up Immunity

Zi-Ping Chen、Ming-Dou Ker (1.ESD Protection Technology Department, System-on-Chip Technology Center Industrial Technology Research Institute、2.Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics National Chiao -Tung University)

2003 International Conference on Solid State Devices and Materials |PDF ダウンロード

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