[A-2-5] Generation of a New Interface-State Associated with Ultra-Thin Gate Dielectrics/Silicon under Electric Stress

H. Mori¹、H. Matsuyama¹、S. Watanabe² (1.Fujitsu Microelectronics Ltd.、2.Fujitsu Labs. Ltd., Japan)

https://doi.org/10.7567/SSDM.2008.A-2-5