The Japan Society of Applied Physics

[A-8-4] Hybrid Gate Structures of NMOS : Poly-Si / PMOS : 2 Layers Ni-FUSI by using Flash Lamp Anneal (FLA) and CMP

H. Ohta1、S. Akiyama2、H. Fukutome1、K. Ookubo2、K. Kawamura2、N. Idani2、S. Satoh1 (1.Fujitsu Labs. Ltd.、2.Fujitsu Microelectronics Ltd., Japan)

https://doi.org/10.7567/SSDM.2008.A-8-4