[A-8-4] Hybrid Gate Structures of NMOS : Poly-Si / PMOS : 2 Layers Ni-FUSI by using Flash Lamp Anneal (FLA) and CMP

H. Ohta¹, S. Akiyama², H. Fukutome¹, K. Ookubo², K. Kawamura², N. Idani², S. Satoh¹ (1.Fujitsu Labs. Ltd., 2.Fujitsu Microelectronics Ltd., Japan)

https://doi.org/10.7567/SSDM.2008.A-8-4