The Japan Society of Applied Physics

[B-5-1] Design and Optimization of Gate Sidewall Spacers to Achieve 45nm Ground Rule for High-performance Applications

T. Miyashita1、K. Ookoshi2、A. Hatada2、K. Ikeda1、Y. S. Kim1、M. Nishikawa2、T. Sakoda1、K. Hosaka1、H. Kurata1 (1.Fujitsu Labs. Ltd.、2.Fujitsu Microelectronics Ltd., Japan)

https://doi.org/10.7567/SSDM.2008.B-5-1