[B-9-4] Effect of Poly/SiON Gate Stack Combined with Thin BOX and Ground Plane for Low Vth and Analog Applications of FDSOI Devices

C. Fenouillet-Beranger^1,2、P. Perreau^1,2、S. Kohler¹、F. Arnaud¹、M. Cassé²、X. Garros²、C. Laviron^1,2、P. Garnier¹、P. Rivallin²、D. Chanemougame¹、R. Beneyton¹、A. Torres^1,2、D. Barge¹、N. Cherault¹、P. Gouraud¹、F. Leverd¹、E. Deloffre¹、M. Gros-Jean¹、N. Loubet¹、F. Abbate¹、M. Fournier¹、M. Gattefait¹、J. D. Chapon¹、B. Le-Gratiet¹、M. Gregoire¹、J. Bienacel¹、P. Gros¹、N. Kubler¹、G. Guierleo¹、C. Mezzomo¹、M. Marin¹、C. Leyris¹、R. Pantel¹、O. Faynot²、C. Buj²、F. Andrieu²、S. Barnola²、T. Salvetat²、S. Denorme¹、S. Deleonibus²、T. Skotnicki¹ (1.STMicroelectronics、2.CEA-LETI/MINATEC, France)

https://doi.org/10.7567/SSDM.2008.B-9-4