A Low Voltage Programming Scheme Feasible for 2-Bit Operation of SONOS Flash Memory with Excellent Data Retention

J. H. Kuo; S. S. Chung; Y. H. Tseng; C. S. Lai; Y. Y. Hsu; E. Ho; T. Chen; L. C. Peng; C. H. Chu

doi:https://doi.org/10.7567/SSDM.2008.J-6-2

2008 International Conference on Solid State Devices and Materials

Sep 23, 2008 - Sep 26, 2008
Tsukuba International Congress Center (EPOCHAL TSUKUBA), Ibaraki, Japan

[J-6-2] A Low Voltage Programming Scheme Feasible for 2-Bit Operation of SONOS Flash Memory with Excellent Data Retention

J. H. Kuo¹, S. S. Chung¹, Y. H. Tseng², C. S. Lai², Y. Y. Hsu³, E. Ho³, T. Chen³, L. C. Peng³, C. H. Chu³ (1.National Chiao Tung Univ., 2.Chang Gung Univ., 3.ProMOS Tech. Inc., Taiwan)

https://doi.org/10.7567/SSDM.2008.J-6-2

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