[P-2-8] Copper Plug Barrier Process Optimization for Reliable Transistor Performance

S. K. Manhas¹、M. Chen¹、K. D. Buddharaju¹、H. Y. Li¹、R. Murthy¹、S. Balakumar¹、N. Singh¹、G. Q. Lo¹、D. L. Kwong¹ (1.Inst. of Microelectronics, Singapore)

https://doi.org/10.7567/SSDM.2008.P-2-8