[G-2-7L] A 1.2V Operation 2.43 Times Higher Power Efficiency Adaptive Charge Pump Circuit with Optimized V_TH at Each Pump Stage for Ferroelectric (Fe)-NAND Flash Memories

S. Noda¹、T. Hatanaka¹、M. Takahashi²、S. Sakai²、K. Takeuchi¹ (1.Univ. of Tokyo(Japan)、2.AIST(Japan))

https://doi.org/10.7567/SSDM.2009.G-2-7L