[G-6-2] A Negative Word-line Voltage Step-Down Erase Pulse Scheme with ΔV_TH=⅙ ΔV_ERASE for Enterprise SSD Application Ferroelectric(Fe)-NAND Flash Memories

R. Yajima¹、T. Hatanaka¹、M. Takahashi²、S. Sakai²、K. Takeuchi¹ (1.Univ. of Tokyo(Japan)、2.AIST(Japan))

https://doi.org/10.7567/SSDM.2009.G-6-2