[K-7-6] The Performance of Magnetic Tunnel Junction Integrated on the Back-end Metal Line of CMOS Circuits
T. Endoh1, F. Iga1, S. Ikeda1, K. Miura1,2, J. Hayakawa2, M. Kamiyanagi1, H. Hasegawa1, T. Hanyu1, H. Ohno1
(1.Tohoku Univ.(Japan), 2.Hitachi, Ltd.(Japan))
https://doi.org/10.7567/SSDM.2009.K-7-6