[P-2-12] Evaluation of Thin LSI Wafers by Capacitance-Time (C-t) Measurement for the Process Characterization of Three-Dimensional (3D) Integration

J.C. Bea¹、M. Murugesan¹、Y. Ohara¹、A. Noriki¹、H. Kino¹、K. W. Lee¹、T. Fukushima¹、T. Tanaka¹、M. Koyanagi¹ (1.Tohoku Univ.)

https://doi.org/10.7567/SSDM.2009.P-2-12