Trap Profile and Bias Temperature Instability of ALD-HfSiON Gate Stacks in Advanced MOSFETs

C. K. Chiang; Y. H. Chen; N. C. Su; S. J. Wang; C. C. Huang; H. Y. Huang; C. H. Wu

doi:https://doi.org/10.7567/SSDM.2009.P-3-23

2009 International Conference on Solid State Devices and Materials

Oct 6, 2009 - Oct 9, 2009
Sendai Kokusai Hotel, Miyagi, Japan

[P-3-23] Trap Profile and Bias Temperature Instability of ALD-HfSiON Gate Stacks in Advanced MOSFETs

C. K. Chiang¹, Y. H. Chen¹, N. C. Su¹, S. J. Wang¹, C. C. Huang¹, H. Y. Huang¹, C. H. Wu² (1.National Cheng Kung Univ.(Taiwan), 2.Chung Hua Univ.(Taiwan))

https://doi.org/10.7567/SSDM.2009.P-3-23

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