[16a-4C-1~11] 13.8 Compound and power electron devices and process technology

△ [16a-4C-3] AlAs/InGaAs double barrier p-i-n junction diode for Superlattice FET

〇Atsushi Yukimachi¹, Yasuyuki Miyamoto¹ (1.Tokyo Tech.)

Keywords:superlattice FET,steep slope,junction diode

To decrease power consumption and compute quickly, the FETs whose subthreshold slope is steeper than conventional FETs are desired. As an approach, supperlattice-based FETs are proposed, which have not been realized yet. So, heading towards the first step in order to realize it, we fabricated AlAs/InGaAs double barrier p-i-n junction diodes to observe the steep I-V characteristics. As a result, we observed big n value humps, which are estimated to be due to the effects of double barrier, but we could not find the region where n is less than 1.