The 62nd JSAP Spring Meeting, 2015

Presentation information

Oral presentation

15 Crystal Engineering » 15.8 Crystal evaluation, impurities and crystal defects

[12p-A18-1~18] 15.8 Crystal evaluation, impurities and crystal defects

Thu. Mar 12, 2015 2:00 PM - 7:00 PM A18 (6A-208)

5:00 PM - 5:15 PM

[12p-A18-12] Low Temperature Annealing Behavior of Iron-Related Deep Levels in n-type Silicon Wafer

〇Ayumi Onaka1, Takeshi Kadono1, Noritomo Mitsugi1, Kazunari Kurita1 (1.SUMCO)

Keywords:metal contamination in silicon wafer,metal related deep level in silicon wafer,DLTS