Hiroyuki Tanaka

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Speaker, Author, Co-Author

Fri. Sep 16, 2016 1:45 PM - 5:00 PM B10 (Exhibition Hall)

Oral presentation
| 13 Semiconductors
| 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

[16p-B10-1~12] 13.4 Si wafer processing /Si based thin film /MEMS/Integration technology

2:45 PM - 3:00 PM

[16p-B10-5] Techniques to improve the resist plane uniformity within the half-inch wafer by minimal coater

〇Hiroyuki Tanaka^1,2, Takuya Koga², Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.AIST, 2.MINIMAL)

3:30 PM - 3:45 PM

[16p-B10-7] Through silicon via etching with high-speed gas-switching Bosch process using minimal ICP deep trench etcher

〇Hiroyuki Tanaka^1,2, Hisato Ogiso^1,2, Shizuka Nakano^1,2, Toshihiro Hayami³, Toshiya Miyazaki³, Sommawan Khumpuang^1,2, Shiro Hara^1,2 (1.AIST, 2.MINIMAL, 3.SPPT)

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