5:15 PM - 5:30 PM
[6p-C21-14] Fabrication of Micro-SOI-Diaphragm Structures Using Minimal Deep-RIE and Mask Aligner
Keywords:SOI, diaphragm
Recently, we have developed the SOI-CMOS integrated circuits using minimal-fab and mega-fab hybrid processes. In this work, as one of the basic MEMS structures, we fabricate PMOSFETs on SOI diaphragms by using the minimal deep-RIE and mask aligner, and investigate the elctrical characteristics of the fabricated PMOSFETs.