The 64th JSAP Spring Meeting, 2017

Presentation information

Oral presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[14a-304-1~10] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

Tue. Mar 14, 2017 9:15 AM - 12:00 PM 304 (304)

Takashi Noguchi(Univ. of the Ryukyus), Seiichiro Higashi(Hiroshima Univ.), Taizoh Sadoh(Kyushu Univ.)

10:15 AM - 10:30 AM

[14a-304-5] CMOS Inverter on Glass Substrate using Vth Control of Self-Aligned Four-Terminal Planar Metal Double-Gate Low-Temperature Poly- Si TFTs

Hiroki Ohsawa1, Akito Hara1 (1.Tohoku Gakuin Univ.)

Keywords:TFT, poly-Si, CMOS inverter

We fabricated a CMOS inverter on glass substrate consisting of self-aligned four-terminal planar metal double-gate low-temperature poly-Si TFTs. By controlling the Vth of four-terminal TFTs around 0 V using the control voltage, excellent CMOS inverter characteristics in which the transition occurs at Vdd/2 were obtained at Vdd = 1.0 V.