The 64th JSAP Spring Meeting, 2017

Presentation information

Oral presentation

13 Semiconductors » 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

[14a-304-1~10] 13.4 Si wafer processing /Si based thin film /Interconnect technology/ MEMS/ Integration technology

Tue. Mar 14, 2017 9:15 AM - 12:00 PM 304 (304)

Takashi Noguchi(Univ. of the Ryukyus), Seiichiro Higashi(Hiroshima Univ.), Taizoh Sadoh(Kyushu Univ.)

11:15 AM - 11:30 AM

[14a-304-8] Self-Aligned Planar Metal Double-Gate Cu-MIC Poly-Ge TFTs Fabricated at 300℃ on Glass Substrate

Hiroki Utsumi1, Taisei Sasaki1, Shunya Sekiguchi1, Shoya Takeuchi1, Hiroki Ohsawa1, Akito Hara1 (1.Tohoku Gakuin Univ.)

Keywords:poly-Ge, TFT

In this paper, we developed poly-Ge TFTs at 300℃ process on glass substrate. We used three key technology: first, self-aligned planar MeDG structure to reduce off-current, second, metal induced crystallization (MIC) using copper (Cu) (Cu-MIC) to fabricate poly-Ge film at 300℃, and, third, Al-LM-SD at 300℃ to achieve low resistance metallic SD. This TFT demonstrated on/off ratio of 30 and mobility of 25 cm2/Vs on a glass substrate. Our proposal will become one of novel method to fabricate high performance TFTs on plastic substrate, because process temperature of 300℃ is adaptable for plastic substrate.