The 79th JSAP Autumn Meeting, 2018

Presentation information

Oral presentation

13 Semiconductors » 13.5 Semiconductor devices and related technologies

[20a-CE-1~12] 13.5 Semiconductor devices and related technologies

Thu. Sep 20, 2018 9:00 AM - 12:15 PM CE (Century Hall)

Takahiro Mori(AIST)

9:15 AM - 9:30 AM

[20a-CE-2] Reduced Subthreshold Slope Variability at High Temperature in Bulk and SOTB MOSFETs

〇(M2)Shuang Gao1, Tomoko Mizutani1, Kiyoshi Takeuchi1, Masaharu Kobayashi1, Toshiro Hiramoto1 (1.IIS, Univ. of Tokyo)

Keywords:variability, temperature, subthreshold slope

This paper presents a new finding that subthreshold slope (SS) variability is reduced at high temperature, owing to a negative correlation between SS and its temperature coefficient dSS/dT. To explain this, an effective current path model is proposed, and verified by 3D TCAD simulation.