Multi-level 2-bit/cell operation utilizing Hf-based MONOS device

Sohya Kudoh; Shin Ishimatsu; Yusuke Horiuchi; Shun-ichiro Ohmi

Presentation information

Oral presentation

13 Semiconductors » 13.1 Fundamental properties, surface and interface, and simulations of Si related materials

[21p-135-1~16] 13.1 Fundamental properties, surface and interface, and simulations of Si related materials

Fri. Sep 21, 2018 1:00 PM - 5:15 PM 135 (135)

Tomo Ueno(TUAT), Koichiro Saga(Sony)

1:30 PM - 1:45 PM

△ [21p-135-3] Multi-level 2-bit/cell operation utilizing Hf-based MONOS device

〇(P)Sohya Kudoh¹, Shin Ishimatsu¹, Yusuke Horiuchi¹, Shun-ichiro Ohmi¹ (1.Tokyo Tech.)

Keywords:nonvolatile memory, Hf, multi-level/cell

The memory characteristics of diodes and MISFET with Hf-based MONOS gate stack structure were investigated in our previous reports. in this study, the multi-level 2-bit/cell operation utilizing Hf-based MONOS device was investigated.